Artificial intelligence (AI) is promoting technological development at an unprecedented speed. From chip design to system implementation, innovation has become a key to the driving force. In response to industry challenges, Cadence, a leader in EDA, held the 2025 CadenceCONNECT User Conference on the 21st of this month, inviting most semi-conductor and AI experts to provide various solutions for semiconductor design challenges.

Introduction to the theme forum, Song Baian, general manager of Cadence Taiwan, pointed out that generating codes is no longer a difficult thing to imagine. Today's engineers may not even write programs by themselves, because AI is better than engineers. Now we should think about how to make AI play a greater role, liberate human resources to focus on creativity and ideas, and use innovative technology to help designers make better IC designs in various EDA tools.

Song Bai'an believes that as an auxiliary tool, how to transform the spirit into a feasible design through EDA is the real challenge. In addition, among the many IC design skills, verification is becoming more and more important. How to write a more complete Test Plan and improve verification efficiency is a topic that designers must think about.

AI drives "virtual engineer" to create the next stage of production capacity

In the theme lecture, Paul Cunningham, Vice President and General Manager of Cadence System Verification, pointed out that with the continuous development of AI, it will help solve the human bottlenecks we are currently encountering. As technology continues to develop, the era when chip design processes can be completed by dialogue will not be far away. He also expected that in the future, an engineer might lead 10, or even 100 virtual engineers, to promote chip design to the next stage of production capacity.

From the current forecast, by 2030, the global semiconductor market size has been revised up to $1.2 trillion from the original forecast of $95 billion, an increase of $25 billion in just one year. The driving factor behind it is the AI-based construction. Cunningham expects that "this is just the beginning", just like the Internet 25 years ago, it will gradually apply to more scenes, and AI will also expand from data centers to the physical world, covering equipment, robots, unmanned machines, self-driving cars, and even health and science, and is even expected to become a "mega-dollar" market.

As NVIDIA's Blackwell chips have reached about 20 billion transistors, Cunningham predicts that by the end of 2030, the number of transistors in a single chip will exceed 1 megabyte, which is expected by the far-over-Flexor Law, so the industry is accelerating its transformation to multi-chip integration, as well as 2.5D and 3D packaging technologies, pushing to 16-layer chip stacks and matching high-level HBMs to meet the increasing demand for computing power.

In order to satisfy customer vision and think about what architecture can best achieve advantages, Cadence decided to use Digital Twin as a strategy to replace expensive and inefficient physical experiments with accurate computing models.

For example, in response to design simulation requirements, Cadence provides a Palladium platform, which can scale to thousands of billions of logical gates, becoming an indispensable tool for enterprises such as NVIDIA to develop new chips. In addition, Cadence and NVIDIA have launched the Millennium Supercomputer, which has compressed weeks or even months of hot simulation, power migration, IR Drop or fluidity simulations to just a few hours, covering the simulation efficiency of the physical world. At the same time, design technology collaboration optimization (DTCO) will also play a key role, requiring tight collaborations of processes, design tools, smart property (IP), and the entire ecosystem.

In the advanced packaging and 3D IC part, Cadence provides the Integrity 3D-IC platform, integrating chip design, packaging, simulation and circuit board design, and combining the advantages of Cadence's Allegro, Virtuos, Innovus, as well as a complete set of physical simulation tools Celsius, Quantus, Voltus, etc. Cunningham pointed out that by the end of this year, the Integrity 3D IC platform alone can complete more than 100 design films.

Cadence promotes agent AI workflows, aiming to achieve fully automated "Silicon Agent"

With the 2022 large language model rising, Cadence sees new opportunities. Cunningham said chip designs have evolved from tool licensing to "virtual engineer" licensing, converting demand into specifications or programs through natural language, helping engineers expand their capacity and break through the human power bottleneck.

Cunningham pointed out that Cadence is promoting "optimized AI" to "dialogue AI", where any tool operates through a chat interface and builds professional knowledge, documents and training data, as if there are specialist application engineers at any time. More than 50% of Cadence tools are driven by AI and are expected to exceed 90% in the next two years.

Cadence's current AI solutions include Cerebrus, verification platforms Verisium, Virtuoso Studio and Optimality System, which have been widely used in the industry. Cunningham also revealed that in the next 12 to 18 months, more "agentic workflow" technologies will be launched to allow engineers to interact with virtual humans and complete their operations, and finally "Silicon Agent", a virtual engineer who can perform a complete chip design process instead of humans.

To achieve this goal, Cadence creates JedAI, a proxy AI platform, to integrate the big language model with internal design data, and connect with industry standards (such as MCP), allowing different tools to collaborate in the form of agents. AI Studio and proxy assistants also embed Allegro, Virtuoso, Cerebrus and Verisium to help engineers complete IP migration, PPA exploration, verification and error correction in conversations, creating a "Vibe Coding" experience for customized design; in the front-end design part, Cadence launched a VS Code plug-in, which can automatically check RTL and Testbench (testing platform), perform high-level synthesis, error removal and program correction, and deeply connect Cadence. Tools greatly improve engineer production capacity.

"This is a 'moon landing plan'!" Paul said that the final vision of Cadence is the fully automated Silicon Agent. It may take two or even five years to complete, but it has great potential and will ultimately transform the way chip design is "this is a very exciting era."

Design thinking changes, future packaging thinking needs to be included in the ecological system and earthly politics

Kevin Hu, deputy general manager of IC packaging/SIPI/PCB of

, said that today's product competition is increasingly determined by packaging. In the past, chip performance was almost entirely determined by design. Packaging was just a carrier, but now it is different. When different chips and components are integrated, packaging not only affects the system performance, but also directly improves the overall product performance. Therefore, the design must be considered from the overall perspective of chips, packaging, and systems. In the future, it will be more complicated and needs to be included in the entire ecosystem, including supply chains, materials, equipment, technical foundations, and ground politics.

Nelson Duann, senior vice president of Huirong Technology's customer and automobile storage department, pointed out that at the beginning, the development of AI mainly focused on the application and computing capabilities of data centers, but to truly integrate into daily life, AI must develop and deploy to the edge (Edge), but cost and power consumption will be the biggest challenge.

Vice President of Guangda Computer James Jau has followed the development process of AI servers. Since the first professional AI server DGX-1 in 2016, the entire industry has gradually evolved from the Scale-up architecture of traditional servers to the Scale-out architecture, and then returned to the Scale-up due to AI needs. However, as power consumption continues to rise, it is necessary to rely on advanced heat dissipation technologies such as water cooling.

In addition to the aforementioned wonderful theme speech, this time Cadence also invited experts from Dunghai Technology, Joint Development, Joint Studies, Tsinghua University, Realtek, Huirong Technology, Super Micro, Taiwan Electric and other industry experts, bringing more than 35 technical sharing sessions. The venue also integrates many industry partners, including Taiwan Electronics, Telecom, Creative Electronics, Everstar Technology (M31), Skymizer, Intelligent Services, Yingyang Technology, Maoyuan and Xinfu Technology, etc., and jointly set up interactive display positions to show the latest AI technology and application achievements.